Accelerator Work Group
The Accelerator work group will be a persistent, standing group that defines, documents, manages, and maintains standards which define the interfaces between the processor and accelerator devices and their associated development tools. This includes hardware, firmware and any other software require for accelerators to operate within OpenPOWER compliant systems. It will also identify future requirements and propose innovations to the interfaces to enable advances in accelerator capabilities and work with other working groups as appropriate.
Accelerated Application Ecosystem Requirements Work Group
The Accelerated Application Ecosystem Requirements Work Group (AccAppReq WG) is collecting and dispositioning the list of tools, libraries, frameworks and other components/resources needed in the OpenPOWER software ecosystem to ensure that accelerated applications support OpenPOWER servers. These requirements are being collected from actual ISVs who either have or considered porting and/or developing on the platform.
Compliance Work Group
The OpenPOWER Compliance Work Group will define OpenPOWER key interfaces that need to be compliant in a standard specification of compliance and define how to measure and document compliance pre-silicon and post-silicon.
Subcommittees for each set of related key interfaces will be formed to address reference test harnesses and reference test suites. This will allow for focused effort by the experts and interested members of the related key interfaces. The importance of this Work Group is to be able to maintain software and hardware interoperability through following the compliance specifications.
Hardware Architecture Work Group
This work group is a persistent WG focused on the ongoing development of OpenPOWER System Hardware Architecture Specifications. Specifications included in, but not limiting the scope will be the OpenPOWER Profile of the POWER ISA, the IO Device Architecture (IODA), and the Coherent Accelerator Interface Architecture (CAIA). The OpenPOWER Profile is defined as the subset of instructions and features of the POWER ISA required to support the OpenPOWER ecosystem. The IO Device Architecture describes the “host bridge” functions / interface support for IO Devices, for example PCIe Host Bridge. CAIA describes the interface to the Operating System (OS) by defining how the OS should work with a Coherent Accelerator Processor Interface (CAPI) Device attached tothe Power Service Layer (PSL).
LibreBMC Work Group
The LibreBMC SIG is a project workgroup whose purpose is to design an open source Baseboard Management Controller (BMC) based compatible with the Open Compute Project (OCP) DC-SCM specification.
The goal of the SIG is to design the adapter, based on the POWERower ISA processor core, and all required interfaces and controls using open source tools in order to contribute to their growth and usability.
The requirement of a POWER ISA core will drive the design and open release of a new or improved POWER soft-core.
The scope of the LibreBMC SIG is the creation of a BMC adapter. The scope will include an adapter design with an FPGA controller. The FPGA will consist of a POWERower ISA core(s) that can run the OpenBMC stack (including LSB) and manage the interface between system-management software and platform hardware. The FPGA will also have all controls and interfaces required of a typical BMC.
The LibreBMC adapter will be compatible with the OCP DC-SCM specification. Any changes to the OCP DC-SCM specification is outside the scope of this workgroup and will be handled through OCP.
The adapter should meet the requirements to manage a variety of server architectures, including but not limited to POWERower, ARM, and x86 based systems.
Any changes to system reference designs or specifications to use the adapter are outside the scope of this workgroup.
The scope of the workgroup will require the use of Linux, OpenBMC, open source tools, interfaces, and components. Any modifications of these are outside the scope of the workgroup and will be handled through their respective bodies.
Discuss channel: https://discuss.openpower.foundation/c/sig/librebmc/
Machine Learning Work Group (OPMLWG)
The OpenPOWER Machine Learning Work Group provides a forum for collaboration that will help define frameworks for the productive development and deployment of machine learning solutions using OpenPOWER ecosystem technology.
As part of the ecosystem, the OPMLWG plays a crucial role in expanding the OpenPOWER mission. It focuses on addressing the challenges machine learning project developers are continuously facing by identifying use cases, defining requirements and extracting workflows, to better understand processes with similar needs and pain points. The working group will also identify and develop technologies for the effective execution on machine learning applications by enabling hardware (HW), software (SW) and acceleration across the OpenPOWER ecosystem.
Memory Work Group
The OpenPOWER Memory work group is a persistent, standing group that defines, documents, manages and maintains the interface requirements (protocol, timing, etc.) between the OpenPOWER Processor Memory Channel which provides a common intermediate interface to memory controllers that attach to physical memory. It will also identify which type of memory technology and ensure that the interface will be compatible, suitable with OpenPOWER Memory Bus. Since this work group affects the area of both hardware and software in the OpenPOWER ecosystem, it is expected that its activities will be related to the activities of the
OpenPOWER Ready™ Work Group
Physical Science Work Group
This Work Group aims at addressing the challenges of Physical Science projects by developing use cases, identifying requirements and extracting workflows, to better understand common workflows with related needs and pain points.
Systems Software Work Group (Open Source)
The Systems Software work group will serve as the stewards, incubators, and drivers (when feasible) of system software enablement for OpenPOWER Foundation hardware. As such, the work group will work to ensure the availability of all software required to boot, run, and manage Linux on OpenPOWER compliant systems. This includes platform firmware, virtualization environments, Linux itself, toolchain (compilers, core libraries, debuggers, etc.) and platform management software. This does not include software specifically used to enable end user application execution. The goal for all software is availability under an appropriate open source license.
Scalable Datacenter Architectures Discussion Group
This Discussion Group has been formed and is headed by Eugen Schenfeld, IBM Watson Research Lab.