Technical Documents for Public Review

This is a new page where technical documents will be available for public review.

Current Documents Available for Review:

OpenPOWER FSI Compliance Specification – Commenting period closes January 21, 2018.

The purpose of the OpenPOWER FSI Compliance Test Harness and Test Suite (TH/TS) Specification is to provide the test suite requirements to be able to demonstrate OpenPOWER FSI compliance. 

Click here to submit a comment or subscribe to the comment email distribution list for the OpenPOWER FSI Compliance Specification.

OpenPOWER CAPI 2.0 Accelerator Compliance: Test Specification – Commenting period closes January 21, 2018.

The purpose of the OpenPOWER CAPI Accelerator Compliance – Test Specification is to provide the test suite requirements to demonstrate compliance of an OpenPOWER CAPI Accelerator solution with the OpenPOWER Power Service Layer (PSL) to Accelerator Function Unit (AFU) Interface Specification and the OpenPOWER Coherent Accelerator Interface Architecture Version 1 (CAIA V1) Specification.

Click here to submit a comment or subscribe to the comment email distribution list for the OpenPOWER CAPI 2.0 Accelerator Compliance Specification

OpenPOWER ISA Compliance Definition  – Commenting period closes December 8, 2017.

The OpenPOWER ISA Compliance Definition defines the test suite requirements to demonstrate OpenPOWER ISA Profile compliance.

It contains the following:

  • Section describing the test harness needed to execute the test suite
  • Section describing the tests required to be in the test suite
  • Section describing the successful execution of the test suite, including what it means for an optional feature to fail.

The testing of a processor implementation’s compliance against the Power ISA – OpenPOWER Profile is ultimately intended to ensure that software shown to execute properly on one compliant processor implementation will execute properly on a different also compliant processor implementation. The testing is not intended to show that the processor implementation under test is robust under all possible operating conditions, inputs, or event time interactions. It is intend to show that the processor implementation under test implemented the ISA as specified and that the ISA specification was interpreted by the processor developers as intended by the ISA specification author.

Click here to submit a comment or subscribe to the comment email distribution list for the OpenPOWER ISA Compliance Definition.