OpenPOWER – The Best Combination of Open and High Performance

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By Hugh Blemings, Executive Director, OpenPOWER Foundation

At the OpenPOWER Foundation, creating a level of open hardware has always been one of our core values. In fact, the Foundation was created back in 2013 to encourage open innovation at a system level around POWER technologies. As of mid-2019, we have seen that innovation realised in our ecosystem in the form of hundreds of products spanning systems, accelerators, adapters, commercial and open source software. Then in August of this year, we, along with IBM,  took our commitment to being open even deeper into the stack with the opening of the POWER instruction set architecture (ISA).

During my opening remarks at the recent OpenPOWER Summit in Lyon, I sketched the linkage between two distinct extremes of hardware in the OpenPOWER Ecosystem and the impact this has on our ecosystem overall.

At one extreme we have the world’s fastest supercomputers – for example the Summit and Sierra systems in the US that draw on the expertise of over a dozen OpenPOWER Foundation members including IBM, Nvidia, Mellanox and Red Hat.

At the other extreme is the release of the Microwatt FPGA Soft CPU Core[0]. Implemented in VHDL and released under an open source license, this proof of concept core runs at about 100MHz and fits on an embedded board barely 2.5” by 1”. Performance is modest to be sure, but in this particular case, it’s not so much about the FLOPS as it is about flexibility.

See, both Microwatt and Summit/Sierra share a common Instruction Set Architecture. Granted, Microwatt at present is confined to the subset of integer instructions, but the toolchain (compilers, linkers, loaders etc.) used to create software for it are identical and can generate code without modification for either run time environment[1].  Indeed, the developers of Microwatt used a recent version of Fedora to build the binaries to exercise the implementation during development.

This commonality of instruction set architecture accomplishes several things.

First, it provides groups interested in developing bespoke acceleration hardware that needs extensions to the ISA with a stable and mature environment in which to experiment, prototype and implement. You could put Microwatt core(s) into a large Xilinx FPGA alongside your specialised FPGA acceleration logic, add your custom instructions to the ISA[2] and do your proof of concept before migrating to an ASIC or Full Silicon solution. Along the way, you’ll be able to participate in the ISA Working Group to ensure the instructions you add will fit into the official ISA going forward.

Secondly, a common ISA gives developers of embedded systems a mature 64 bit ISA and associated ecosystem to work with whether their target be FPGAs, ASICs or full custom silicon SoC. It is clear from conversations that we have had since the opening of the ISA was announced in August that there is an appetite for a high performance, open 64 bit ISA solution to complement the increasingly vibrant (and, in a good way, less complex) 32 bit Open ISAs that have captured so much mindshare.

Last, but by no means least, this architecture enables an even lower cost entry point for individual developers looking to “tinker” with a 64 bit POWER platform – a great compliment to things like Raptor Computing’s developer and mid range Blackbird and Talos II POWER9 based systems, or Inspur, IBM, Yadro and Wistron’s high-end servers that power data centres and supercomputers around the globe.

All from a common ISA (a very mature one at that).

In her keynote at the OpenPOWER Summit in Lyons last week, Mendy Furmanek, President of the OpenPOWER Foundation, compared an ecosystem to the sea – when the tide rises, all the boats, large and small, rise up with it. Likewise a software or hardware ecosystem – as more ways to contribute arise, everyone benefits. The recent opening of the POWER ISA and the release of Microwatt provide two new ways to get involved in the OpenPOWER ecosystem.

If you’re at SC19 in Denver this month, drop by the OpenPOWER Booth (Booth 1494) or our stand in the IBM Booth (Booth 1525) to chat about how you can do just that. Perhaps you are an individual contributor who would like to develop on OpenPOWER. Perhaps you are looking to develop a custom acceleration solution and want a robust and mature ISA to underpin your work, or perhaps you are looking to develop an indiginous microprocessor for hyperscale and HPC application and want to draw on a proven HPC-ready ISA. 

OpenPOWER can help you get there.

We look forward to you joining us in this new chapter in OpenPOWER’s journey!

P.S. Rumor has it that Microwatt will be ready to run a standard Linux distro in the not too distant future, stay tuned… 😉

FOOTNOTES

[0] To hear more about Microwatt, check out Anton Blanchard and Michael Neuling’s presentation at the EU Summit on our Youtube channel 

[1] For the very technically inclined, Microwatt uses the standard PPC64LE toolchain with compiler flags set to prevent generation of floating point and vector instructions which, in its current form at least, microwatt doesn’t implement.

As an example CFLAGS = -Os -g -Wall -std=c99 -msoft-float -mno-string -mno-multiple -mno-vsx -mno-altivec -mlittle-endian -fno-stack-protector -mstrict-align -ffreestanding -fdata-sections -ffunction-sections

[2] There is even a tutorial, contributed by an open source community member, on how to add a simple instruction already available