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Collection of hardware designs for the SP010 POWER8 reference platform.  This OpenPOWER Development Platform Workgroup Note provides the material used for the design of the Tyan SP010 development system as a reference for developers of OpenPOWER systems based on the IBM Power8TM chipset....

POWER8 Evaluation System is single socket ATX form factor, BMC based evaluation board. It is designed and will be fulfilled by Tyan Corporation an OpenPOWER Foundation Platinum member. Note that this is an early development system for “Evaluation Purposes Only” and not intended for production...

With the US Department of Energy’s announcement of plans to base two future flagship supercomputers on IBM POWER CPUs, NVIDIA GPUs, NVIDIA NVLink interconnect, and Mellanox high-speed networking, many developers are getting started building GPU-accelerated applications that run on IBM POWER processors. The good news...

The Power Cloud that enables developers offers no-charge remote access to IBM hardware, including IBM POWER9, IBM POWER8 and IBM POWER7+ processor-based servers on the Linux, IBM AIX and IBM i operating systems. PDP is intended for Development, Porting and Functional testing. ...

This document defines the Coherent Accelerator Interface Architecture (CAIA) for the IBM® POWER8® systems. The information contained in this document allows various CAIA-compliant accelerator implementations to meet the needs of a wide variety of systems and applications. Compatibility with the CAIA allows applications and system...

A CAPI based accelerator interfaces to the POWER system through a logic unit called the Power Service Layer (PSL).  The Accelerator Function Unit (AFU) contains the logic that implements the unique acceleration function.  This OpenPOWER Accelerator Workgroup Specification defines the logical interface between the PSL...