The POWER8 processor is the latest RISC (Reduced Instruction Set Computer) microprocessor from IBM and the first processor supporting the new OpenPOWER software environment. Power8 was designed to deliver unprecedented performance for emerging workloads, such as Business Analytics and Big Data applications, Cloud computing and Scale out Datacenter workloads. It is fabricated using IBM’s 22-nm Silicon on Insulator (SOI) technology with layers of metal, and it has been designed to significantly improve both single-thread performance and single-core throughput over its predecessor, the POWER7i processor. The rate of increase in processor frequency enabled by new silicon technology advancements has decreased dramatically in recent generations, as compared to the historic trend. This has caused many processor designs in the industry to show very little improvement in either single-thread or single-core performance, and, instead, larger numbers of cores are primarily pursued in each generation. Going against this industry trend, the POWER8 processor relies on a much improved core and nest microarchitecture to achieve approximately one-and-a-half times the single-thread performance and twice the single-core throughput of the POWER7 processor in several commercial applications. Combined with a 50% increase in the number of cores (from 8 in the POWER7 processor to 12 in the POWER8 processor), the result is a processor that leads the industry in performance for enterprise workloads. This talk will describe the architecture and microarchitecture innovations made in the POWER8 processor that resulted in these significant performance benefits for cloud applications, workload optimization features for stream processing, analytics and big data workloads, and support for organic workload growth. Finally, this talk will introduce the CAPI accelerator interface that offers system architects a way to accelerate their workloads with custom accelerators seamlessly integrating with the Power system architecture.
Michael Gschwind, PhD
STSM & Manager, System Architecture, IBM Systems & Technology Group
Fellow, IEEE – Member, IBM Academy of Technology – IBM Master Inventor